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Critical temperature programmable logic

using superconductors in FPGA
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(+4, -1)
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Summary: using a combination of superconductors and semiconductors in a programmable logic chip, wherein the temperature of the chip is lowered below the superconductor critical temperature in the programming phase and chip temperature is above critical temperature for active usage.

Programmable gate arrays (and in particular FPGA) are extremely useful devices primarily because of their adaptability. A logic circuit can be programmed (using software) onto a FPGA, and then the circuit can be slightly modified or completely overwritten. I am very interested in these amazing devices, particularly for their potential in AI (check out the article ‘Creatures from primordial silicon’ to see why).

Anyway, FPGA adaptability comes at the price of the complexity of the chip design. Specifically, there needs to be circuitry for both *programming* the chip and circuitry for *using* the chip. The circuitry required for programming the chip includes tracks and switches. As the number of logic gates increases, the complexity of programmable switches increases (I don’t have proof, it’s just an intuitively obvious). So eventually the complexity and size of programmable switches outweighs the number of logic gates, thus heading towards a ‘diminishing returns’ outcome.

So I propose the programming circuitry to be made of superconductors (eg high temperature superconductors), and the rest of the circuitry to be made of normal conductors and semiconductors. In programming mode the temperature of the circuit would be lowered to about -140C, then during normal operation raised to about -130C, Thus the programming circuit would change from being superconductors to electrical insulators, i.e. making the superconductor circuit electrically ‘appear’ and ‘disappear’ depending on temperature.

The main advantage of this is fewer programming switches since the temperature acts as a universal switch. This would lead to more efficient chip design, and possibly making them indefinitely scalable.

xaviergisz, Aug 09 2005

Creatures from primordial silicon http://www.netscrap...ail.cfm?scrap_id=73
using genetic algorithms on FPGA to evolve AI [xaviergisz, Aug 09 2005]

Colder, much colder. http://www.answers..../josephson-junction
[coprocephalous, Aug 09 2005]


       Trinary? (I probably don't understand).
Zimmy, Aug 09 2005

       What improvements in pin count, packaging, functionality, cost, usability, and that sort of thing would be gained by doing this?   

       I can't quite follow what you mean by the number of tracks and switches increasing faster than the number of gates added. I thought these things were basically a 2 dimensional array; add 10 on each side and get 100 more gates. Simply for my own edification, might you elaborate on that statement a bit? I haven't yet learned my new thing for today.
half, Aug 09 2005

       my undestanding is that there are the same number of logic blocks as there are switching blocks (see figure titled "Unsegmented FPGA routing" in Wikipedia article). It is my (admittedly basic) understanding that as the number of logic blocks increases, the *complexity* of each switching block must increase however the complexity of logic blocks stays the same, (again I do not provide proof because of my limited knowledge). note minor edit to reflect this realisation.
xaviergisz, Aug 09 2005

       What a HOT SH*T idea! Give the man a croissant!
subflower, Aug 09 2005

       Temperature prevents a switch/gate from being activatible?
Zimmy, Aug 09 2005

       I suspect that running the chip at such a cool temperature would be quite resource intensive, not to mention adding large amounts of extra weight and volume. Unless, of course they were designed to operate in low temperature environments such as the dark side of the Moon.   

       I guess that a designer must account for the trade off in FPGA adaptability and ASIC speed and economy when designing a machine. Remember though, that for each programmable set of logic, not only do you need the circuitry within the FPGA to change the functions, you also need the complexity for *deciding what to do* in the first place.
Jinbish, Aug 09 2005

       Is the benefit here one of scale? Put otherwise, are these circuits durable and can they be presumed to switch reliably with currents applied in excess of the stepped-down current applied to common semiconductor integrated circuits?
reensure, Aug 09 2005

       Sounds great, but one of the key advantages of an FPGA is that they can be programmed on the fly. Instead of running an intensive and repetitive process in software (example: pixel shaders in a video game), spend a little time programming the FPGA, then run the process in hardware.   

       By requiring that the chip be frozen prior to programming, you essentially remove the on-the-fly aspect.   

       But, this is halfbakery, where applicability is not paramount. [+] for creativity.
Freefall, Aug 09 2005


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